Assembly language

Basics:

• all text is case insensitive (except for strings content of course)
• comments start with # and end with the line
• each instruction must be written on a single line
• otherwise, blanks (spaces, tabs, newlines) are not significant

Literals:

• int values are expected in hexadecimal. ex: FF is 255, 10 is 16, etc.
• other bases are written as [DIGITS]BASE. ex: [1111]2 is 15, [42]10 is 42, etc.
• strings are written using the syntax of Python. ex: 'hello' or "world"
• registers are written as their name. ex: R0, IP, etc.
• labels value are written as @NAME. ex: @mylabel, @IRQ0, etc.

Labels:

• a label is defined by writting its name followed by a colon :. ex: mylabel:
• it can be referenced to with @mylabel as explained above
• special labels IRQx, where x is an interrupt number between 0 and F, are used to specify interrupt handlers
• default handlers are automatically installed for those not specified

Instructions:

• add left right target set target to left + right
• and left right target set target to left AND right
• bus command address data activate the bus passing (and updating) the given registers
• call target call a subroutine
• cp source target copy register source to target
• dec accumulator decrement a register by 1
• div left right target set target to left / right
• eq left right target set target to left == right (1 is true, 0 is false)
• get address target set target to the word at address
• gt left right target set target to left > right (1 is true, 0 is false)
• halt power off the machine
• inc accumulator increment a register by 1
• iret return from an interrupt
• jmp target jump at the given address
• jnz test target jump at target if test is not zero
• jz test target jump at target if test is zero
• lshift left right target set target to left << right (left-shift)
• mod left right target set target to left % right (modulo)
• mul left right target set target to left * right
• neg source target set target to the two's complement of source
• neq left right target set target to left != right (1 is true, 0 is false)
• nintr number raise an interrupt
• nop keep the CPU idle for one cycle
• not source target set target to NOT source
• or left right target set target to left OR right
• pop target pop one word from the stack into a register
• push source push a register onto the stack
• put source address save source to address
• rand target assigns a register with a random value
• reset target set a register to zero
• ret return from a subroutine
• rget address target set target to the word at address (relatively to BP)
• rintr register raise an interrupt
• rput source address save source to address (relatively to BP)
• rshift left right target set target to left << right (right-shift)
• set target value set a register to value (two words instruction)
• sub left right target set target to left - right
• xor left right target set target to left XOR right